State Diagram
Simulation — Traffic Light
State: RED (Q1Q0=00)
T=— → Ready to simulate.
Truth Table (input: T = timer expired)
Student Logic
Q1+ =
Q0+ =
Moore outputs — wired directly from state bits (shown for reference):
R = ~Q1 & ~Q0
G = ~Q1 & Q0
Y = Q1 & ~Q0